Charge-coupled devices (CCDs) find wide applications in almost all digital image-acquisition devices. Invented in the late 1960s by researchers at Bell Labs, these were initially conceived as a new type of computer memory circuit, and were demonstrated in 1970 for that facility. It soon became apparent that because of silicon’s light sensitivity that responds to wavelengths less than 1.1 μm. (The visible spectrum because have many other potential applications, including that of signal processing and imaging, the latter falls between 0.4 um and 0.7 um.) The CCDs early promise as a memory element has since disappeared, but its superb ability to detect light has turned the CCD into a premier image sensor, Like the integrated circuits (ICs), CCDs begin on thin silicon wafers, which are processed in a series of elaborate steps that define various functions within the circuit.
Each wafer contains several identical devices (chips), each capable of yielding a functional device. From the wafer, a few chips are selected based on applications. The selected chips, based on a variety of preliminary screening tests, are then cut from the wafer and packaged into a carrier for use in a system.

Operation of CCD Sensor

The charge-coupled device (CCD) is basically a series of closely spaced MOS capacitors. CCD imaging is performed in three steps:
Step 1:Exposure In this step, the sensor is exposed to the incident light. Upon exposure, light is con- verted into an electronic charge at discrete sites called pixels.
Step 2:Charge transfer Charge transfer moves the packets of charge within the silicon substrate.
Step 3:Charge-to-voltage conversion and output amplification

Photon interaction with silicon
Photon interaction with silicon
Converting Light (Photons) into Electronic

Charge An image is acquired when incident light, in the form of photons falls on the array of pixels. The energy associated with each photon is absorbed by the silicon and causes a reaction to occur. This reaction yields an electron-hole charge pair The photon interaction with silicon. The number of electrons collected at each pixel is linearly dependent on the light level and exposure time and non-linearly dependent on the wavelength of the incident light.
Many factors can affect the ability to detect a photon. Thin films of materials intentionally grown and deposited on the surface of the silicon during fabrication might have a tendency to absorb or reflect light. Photons are absorbed at different depths in the silicon depending on their wavelengths. There are instances during which photon-induced electrons cannot be detected because of the location within the silicon where they were created.

Potential Wells and Barrier

CCDs follows the basic physics of basic metal-oxide semiconductor (MOS)
devices. A CCD MOS structure simply consists of a vertically stacked conductive material (doped polysilicon) overlying a semiconductor (silicon), which is separated by a highly insulating material (silicon dioxide). By applying a voltage potential to the polysilicon or ‘gate’ electrode, the electrostatic potentials within the silicon can be changed. With an appropriate voltage, a potential ‘well’ can be formed which is capable of collecting the localised electrons created by the incident light.  The potential well and barrier. The electrons can be con- fined under this gate by forming zones of higher potentials called barriers sur- rounding the well.

Potential well and barrier
Potential well and barrier

Depending on the voltage, each gate can be biased to form a potential well or a barrier to the integrated charge.

Charge Transfer Once charge has been integrated and held locally by the bounds of the pixel architecture, one should have a means of getting that charge to the sense amplifier that is physically separated from the pixels

Four-Phase CCD

Four phase CCD
Four phase CCD

A four-phase CCD structure is illustrated. Application of bias voltage to the gate of the MOS capacitor results in the creation of a localised potential well in the semiconductor. The photo-generated charges are collected and stored in the potential well. By varying the gate voltages in a systematic and sequential manner, the charge packet can be transported from under one Four-phase CCD electrode to the adjacent electrode. This provides a simple mechanism for moving a charge through the CCD shift register.
A CCD array consists of a series of column registers. The charge packets are con- fined within each row or column by channel stops. At the end of each column there is a horizontal shift register. The charged packets are shifted, one line at a time, into the horizontal shift register. The entire line is then clocked out from the horizontal shift register to the output amplifier before the next line the enters horizontal register.

One important requirement for a good CCD operation is to maintain high charge transfer efficiency (CTE) in the CCD shift register. CTE is a measure of the percentage of electrons that are successfully transferred from under one electrode to under the adjacent electrode. Typically, CTE needs to be no less than 0.99999, Limited time available for charge transfer during high-speed operation, and potential obstacles (barriers and wells) that arise from the device design and processing, can cause an incomplete charge transport and reduction of CTE.
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